1. FIELD OF THE INVENTION
The present invention relates to a sensing amplifier for a capacitive MISFET memory using insulated gate or metal-insulator-semiconductor field effect transistors (hereinafter referred to a MISFETS or simply as FETS).
2. DESCRIPTION OF THE PRIOR ART
In a capactive MISFET memory, amplifying means (sensing amplifier) provided on the side of output line of a memory cell is used to amplify an information signal as an output.
A conventional sensing amplifier includes first and second sensing MISFETs having their gates connected to each other's drain and having their sources grounded, a drive MISFET connected between a supply voltage and the drain of the first sensing MISFET (output terminal), and a precharge MISFET connected between the supply voltage and the drain of the second sensing MISFET (input terminal). One memory cell in the capacitive MISFET memory includes a first reading MISFET which has its drain connected to the input terminal of the sensing amplifier and a second reading MISFET which has its drain connected to the source of the first reading MISFET and its source grounded. The gate of the second reading MISFET is connected to a memory capacitance so that information (output signal) stored on the memory capacitance is supplied to the input terminal of the sensing amplifier when the first reading MISFET receives a reading signal at its gate. The sensing amplifier further includes a precharge capacitor connected to the input terminal of the sensing amplifier at one end thereof and grounded at the other end thereof for presetting the sensing amplifier prior to the application of the output signal from the memory cell to the sensing amplifier. The precharge capacitor is precharged prior to the application of the output signal from the memory cell to the sensing amplifier by applying a first clock signal to the gate of the precharge MISFET in the sensing amplifier. A second clock signal is thereafter applied to the drive MISFET in the sensing amplifier so that the sensing amplifier is brought into a state where it can receive the output signal from the memory cell.
At this stage, the application of the reading signal to the gate of the first reading MISFET in the memory cell causes the second reading MISFET to be turned on when the memory capacitance is charged, i.e., when information "1" is stored therein. As a result, the precharge capacitor begins to discharge through the first and second reading MISFETS in the memory cell. For this reason, the output signal from the memory cell falls low. When the output signal from the memory cell has the voltage less than the threshold voltage of the first sensing MISFET in the sensing amplifier, the first sensing MISFET is turned off and the second sensing MISFET is thus turned on. Thus, the reading of the stored information "1" in the memory cell is accomplished at the output of the sensing amplifier.
A certain time must elapse until the output signal from the memory cell falls near to the threshold voltage of the first sensing MISFET in the sensing amplifier due to the discharge of the precharge capacitor through the first and second reading MISFETs in the memory cell. In view of the fact that the precharge voltage of the precharge capacitor is, for example, 10 to 12 volts and the threshold voltage of the first sensing MISFET is 1 to 2 volts, a long time is required to discharge the precharge voltage by an amount as large as 10 volts through the first and second reading MISFETs in the memory cell including relatively small MISFETs. As a result, there is no possibility of high speed operation.